Engineers use electric fields to form circuits beyond silicon limits

Researchers have developed a novel method to fabricate atomically thin logic circuits using two-dimensional (2D) semiconductors, addressing the limitations of traditional silicon-based transistor scaling. Conventional silicon fabrication struggles at nanoscale dimensions due to electrical interference, leakage, and complex manufacturing, prompting exploration of alternative materials like molybdenum disulfide (MoS₂) and tungsten diselenide (WSe₂). These 2D materials offer efficient charge transport and tunable transistor types but have been difficult to integrate into circuits at scale because existing methods rely on high temperatures, vacuum environments, or manual placement, which hinder consistent, large-scale production. The new approach combines solution-based electrochemical exfoliation to produce large, stable 2D nanosheets with electric-field-guided assembly to precisely position n-type MoS₂ and p-type WSe₂ between electrodes without lithography or high-temperature steps. Electrochemical exfoliation uses voltage to insert ions between crystal layers, gently separating them into micron-scale nanosheets suspended